The invention relates generally to encoding using codes that satisfy run-digital-sum and run length limited conditions.
Before recording or transmission, data are typically encoded in accordance with a modulation code, to modify bit patterns in the data that may adversely affect the demodulation and decoding of the data. Certain bit patterns, for example, long runs without transitions, may adversely affect timing recovery, while other patterns may affect signal to noise ratios, and so forth. Accordingly, the modulation codes generally include run length constraints, and are often also referred to as run length limited (“RLL”) codes.
High rate codes, that is, codes that produce a code word with a small increase in overall bit count, are desirable for their efficiency. To avoid adversely affecting the rate of transmission, it is desirable to encode long data sequences with high rate codes. However, there is a trade off between efficiency and the complexities associated with manipulating the large sequence of data bits into correspondingly wide code words. Further, code complexities may increase when ran length constraints must be considered. A system that efficiently encodes data using a high rate RLL code is described in U.S. Pat. No. 6,839,004, which is hereby incorporated herein in its entirety by reference.
Low DC content is also important for perpendicular bipolar storage systems. Thus, it is also desirable to utilize a modulation code that produces code words that have relatively low running digital sum (“RDS”) values. The RDS values are the sums produced by adding together the +1 and −1 values that correspond to the ones and zeros in the code words. Further, it is desirable to keep the overall number of magnetic transitions low, in order to avoid adversely affecting the signal to noise ratios.